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More efficient cryptographic implementations that are resistant to higher order side-channel attacks are discussed.
Topic 1: Time-Memory Trade-Offs for Side-Channel Resistant Implementations
Author: Praveen Kumar Vadnala
Topic 2: Hiding Higher-Order Side-Channel Leakage—Randomizing Cryptographic Implementations in Reconfigurable Hardware
Authors: Pascal Sasdrich, Amir Moradi and Tim Güneysu
Participants
Pascal Sasdrich
Participant
Research Assistant, Horst Görtz Institute for IT-Security, Ruhr-Universität Bochum, Germany
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