Nicolas Brunie
Principal Design Engineer, SiFive
Principal Design Engineer, SiFive
Nicolas Brunie got his PhD in CS from ENS de Lyon (France) in 2014. His research focus is Computer Arithmetic. He worked at Kalray for over 10 years on the MPPA processors (FPU micro-architecture and design, crypto accelerator micro-architecture and design, software library development including porting OpenSSL, system architecture). He joined SiFive in 2021 as a FPU RTL designer and micro-architect. He currently leads SiFive's ALU/FPU datapath technology group. He has been involved in the RISC-V community since 2020 (various cryptography task groups and floating-point groups). He is the vice chair of RISC-V Post-Quantum Cryptography task group and is the author of a technical blog about RISC-V: https://fprox.substack.com.