Fault and Glitch Resistant Implementations

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Cryptographic designs that are both fault/glitch resistant and side-channel resistant are discussed. Topic 1: Feeding Two Cats with One Bowl: On Designing a Fault and Side-Channel Resistant Software Encoding Scheme Authors: Jakub Breier and Xiaolu Hou Topic 2: An Efficient Side-Channel Protected AES Implementation with Arbitrary Protection Order Authors: Hannes Gross, Stefan Mangard and Thomas Korak
Jakub Breier


Senior Cryptography Security Analyst, Underwriters Laboratories

Hannes Gross


Ph.D. Student, Graz University of Technology

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